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教育部委托研究计画 计画执行:国立台湾大学图书馆
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显示项目 916751-916760 / 2348419 (共234842页) << < 91671 91672 91673 91674 91675 91676 91677 91678 91679 91680 > >> 每页显示[10|25|50]项目
| 國立聯合大學 |
2007 |
VLSI Implementation of High-Performance CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphic Systems
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Tze-Yun Sung, Hsi-Chin Hsin |
| 中華大學 |
2007 |
VLSI Implementation of High-Performance CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphic Systems
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宋志雲; Sung, Tze-Yun |
| 國立成功大學 |
2004-06 |
VLSI implementation of implantable wireless power and data transmission micro-stimulator for neuromuscular stimulation
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Lee, Shuenn-Yuh; Lev, Shyh-Chyang; Chen, Jia-Jin Jason |
| 中華大學 |
2013 |
VLSI IMPLEMENTATION OF LOW-POWER AND HIGH-SFDR DIGITAL FREQUENCY SYNTHESIZER FOR UNDERWATER INSTRUMENTS AND NETWORK SYSTEMS
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莊英慎; Juang, Ying-Shen |
| 中華大學 |
2013 |
VLSI IMPLEMENTATION OF LOW-POWER AND HIGH-SFDR DIGITAL FREQUENCY SYNTHESIZER FOR UNDERWATER INSTRUMENTS AND NETWORK SYSTEMS
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宋志雲; Sung, Tze-Yun |
| 國立高雄第一科技大學 |
2006.04 |
VLSI implementation of low-power high-quality color interpolation processor for CCD camera
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Hsia, Shih-Chang;Chen, Ming-Huei;Tsai, Po-Shien |
| 中華大學 |
2006 |
VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors
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謝曜式; Shieh, Yaw-Shih |
| 國立中山大學 |
1995-12 |
VLSI implementation of multi-valued exponential bidirectional associative memory using current-mode circuits
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C.C. Wang;Y.C. Chen |
| 中華大學 |
2005 |
VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion
|
林國珍; Lin, Kuo-Jen |
显示项目 916751-916760 / 2348419 (共234842页) << < 91671 91672 91673 91674 91675 91676 91677 91678 91679 91680 > >> 每页显示[10|25|50]项目
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