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显示项目 92106-92155 / 2346288 (共46926页)
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机构 日期 题名 作者
臺大學術典藏 2020-06-11T06:21:02Z A 5.12-GHz fractional-N frequency synthesizer with an LC-VCO-based MDLL Jhou, D.-E.;Chang, W.-S.;Lee, T.-C.; Jhou, D.-E.; Chang, W.-S.; Lee, T.-C.; TAI-CHENG LEE
國立交通大學 2015-07-21T08:31:11Z A 5.15-5.825 GHz high-gain and low-noise CMOS down-conversion mixer with low-power for WLAN 802.11a Dai, Yu-Hsiu; Jou, Christina F.
國立交通大學 2014-12-08T15:14:44Z A 5.2 GHz 47 dB image rejection double quadrature Gilbert downconverter using 0.35 mu m SiGe HBT technology Wu, Tzung-Han; Meng, Chinchun; Wu, Tse-Hung; Huang, Guo-Wei
元智大學 2002-08 A 5.2 GHz CMOS RF Fractional-N Frequency Synthesizer for OFDM Communication Application 吳紹懋; Che-Pin Chen; William Chen
國立臺灣科技大學 2009 A 5.2 GHz LOW POWER VCO IN 0.18 mu m CMOS PROCESS Jang, S.L.;Shen, K.C.;Liu, C.C.
國立臺灣科技大學 2009 A 5.2 GHz low power VCO in 0.18 μm CMOS process Jang S.-L.; Shen K.-C.; Liu C.-C.
國立臺灣大學 2008 A 5.2-GHz CMOS T/R switch for ultra-low-voltage operations Wang, Jih-Hsin; Hsieh, Hsieh-Hung; Lu, Liang-Hung
國立臺灣大學 2008-08 A 5.2-GHz CMOS T/R switch for ultra-low-voltage operations Wang, J.-H.; Lu, L.-H.; Hsieh, H.-H.
臺大學術典藏 2018-09-10T15:26:16Z A 5.2-GHz fully-integrated RF front-end by T/R switch, LNA and PA co-design with 3.2-dB NF and 25.0-dBm output power H.-S. Chen;H.-Y. Tsai;L.-X. Chuo;Y.-K. Tsai;L.-H. Lu; H.-S. Chen; H.-Y. Tsai; L.-X. Chuo; Y.-K. Tsai; L.-H. Lu; LIANG-HUNG LU
國立臺灣大學 2005 A 5.2-GHz low-power low-noise amplifier using inGaP-GaAs HBT technology Tai, Chia-Liang; Lu, Shey-Shi; Lin, Yo-Sheng
國立暨南國際大學 2005 A 5.2-GHz low-power low-noise amplifier using InGaP-GaAsHBT technology? 林佑昇; Lin, YS
國立高雄師範大學 2004-12 A 5.25-GHz 0.18-μm CMOS Low Noise Amplifier with a Gain Boosting Ruey-Lue Wang;Shin-Chin Chen;Ming-Lung Kung;Hen-Cho Hung; 王瑞祿
臺大學術典藏 2020-06-11T06:51:00Z A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c Applications Li, M.-R.;Yang, C.-H.;Ueng, Y.-L.; Li, M.-R.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG
臺大學術典藏 2019-10-31T07:45:02Z A 5.28-Gbps LDPC Decoder with Time-domain Signal Processing for IEEE 802.15.3c Applications CHIA-HSIANG YANG; Y.-L. Ueng; CHIA-HSIANG YANG;Y.-L. Ueng;C.-H. Yang;M.-R. Li; M.-R. Li; C.-H. Yang
南台科技大學 2004 A 5.2GHz SiGe/Si HBT-based MMIC power amplifier using on-chip linearizer M. S. Yang; R. J. You; W. S. Chen; J. J. Tang
國立交通大學 2014-12-08T15:46:20Z A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop Chuang, Li-Pu; Chang, Ming-Hung; Huang, Po-Tsang; Kan, Chih-Hao; Hwang, Wei
亞洲大學 2010-12 A 5.3-Mb duplication of 9p12->p13.1 characterized by array CGH in a female infant with developmental delay 陳持平;Chen, Chih-Ping;Lin, Shuan-Pei;Chern, Schu-Rern;Tsai, Fuu-Jen;Lee, Chen-Chi;Pan, Chen-Wen;Wu, Pei-Chen;Wang, Wayseen
中國醫藥大學 2010-12 A 5.3-Mb duplication of 9p12->p13.1 characterized by array CGH in a female infant with developmental delay 陳持平(Chih-Ping Chen)*; (Shuan-Pei Lin); (Schu-Rern Chern); 蔡輔仁(Fuu-Jen Tsai); (Chen-Chi Lee); (Chen-Wen Pan); (Pei-Chen Wu); (Wayseen Wang)
臺大學術典藏 2006 A 5.3GHz low-phase-noise LC VCO with harmonic filtering resistor Wang, Le; Upadhyaya, P.; Sun, Pinping; Zhang, Yang; Heo, Deukhyoun; Chen, Yi-Jan Emery; Jeong, Dongho; Wang, Le; Upadhyaya, P.; Sun, Pinping; Zhang, Yang; Heo, Deukhyoun; Chen, Yi-Jan Emery; Jeong, DongHo
國立臺灣大學 2006 A 5.3GHz low-phase-noise LC VCO with harmonic filtering resistor Wang, Le; Upadhyaya, P.; Sun, Pinping; Zhang, Yang; Heo, Deukhyoun; Chen, Yi-Jan Emery; Jeong, DongHo
國立交通大學 2014-12-08T15:36:49Z A 5.4 mu W Soft-Decision BCH Decoder for Wireless Body Area Networks Yang, Chia-Hsiang; Huang, Ting-Ying; Li, Mao-Ruei; Ueng, Yeong-Luh
臺大學術典藏 2018-09-10T14:57:53Z A 5.4 μw soft-decision bch decoder for wireless body area networks Yang, C.-H.;Huang, T.-Y.;Li, M.-R.;Ueng, Y.-L.; Yang, C.-H.; Huang, T.-Y.; Li, M.-R.; Ueng, Y.-L.; CHIA-HSIANG YANG
臺大學術典藏 2005-06 A 5.4-mW LNA using 0.35- /spl mu/m SiGe BiCMOS technology for 3.1-10.6-GHz UWB wireless receivers Tsai, Ming-Da; Lin, Kun-You; Wang, Huei; Tsai, Ming-Da; Lin, Kun-You; Wang, Huei
國立臺灣大學 2005-06 A 5.4-mW LNA using 0.35- /spl mu/m SiGe BiCMOS technology for 3.1-10.6-GHz UWB wireless receivers Tsai, Ming-Da; Lin, Kun-You; Wang, Huei
臺大學術典藏 2018-09-10T06:37:56Z A 5.5-GHz 16-mW fast-locking frequency synthesizer in 0.18-μm CMOS W.-H. Chiu; T.-S. Chan; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2020-06-11T06:16:49Z A 5.5-GHz multi-mode power amplifier with reconfigurable output matching network Chen, H.-S.;Hsieh, Y.-K.;Lu, L.-H.; Chen, H.-S.; Hsieh, Y.-K.; Lu, L.-H.; LIANG-HUNG LU
國立臺灣科技大學 2007 A 5.6 GHz balanced Colplitts QVCO with back-gate coupling technique Chen H.-M.; Jhuang Y.-D.; Lin J.-C.; Jang S.-L.
國立臺灣科技大學 2009-04 A 5.6 GHz Low Power Balanced VCO in 0.18 $mu$m CMOS Sheng-Lyang Jang;Cheng-Chen Liu;Chun-Yi Wu;Miin-Horng Juang
中國醫藥大學 2008-07 A 5.6 Mb deletion in 15q14 in a boy with speech and language disorder, cleft palate, epilepsy, a ventricular septal defect, mental retardation and developmental delay. 陳持平(Chih-Ping Chen)*; (Shuan-Pei Lin); 蔡輔仁(Fuu-Jen Tsai); (Schu-Rern Chern); (Chen-Chi Lee); (Wayseen Wang)
國立臺灣科技大學 2013 A 5.6-GHz 1-V low power balanced colpitts VCO in 0.18-μm CMOS process Huang, J.-F.;Lai, W.-C.;Huang, K.-J.
亞洲大學 2008-07 A 5.6-Mb deletion in 15q14 in a boy with speech and language disorder, cleft palate, epilepsy, a ventricular septal defect, mental retardation and developmental delay Chen, CP (Chen, Chih-Ping); Lin, SP (Lin, Shuan-Pei); Tsai, FJ (Tsai, Fuu-Jen); Chern, SR (Chern, Schu-Rern); Lee, CC (Lee, Chen-Chi); Wang, W (Wang, Wayseen)
國立交通大學 2014-12-08T15:18:53Z A 5.7 GHz Gilbert upconversion mixer with an LC current combiner output using 0.35 mu m SiGe HBT technology Wu, TH; Meng, CC; Huang, GW
國立臺灣大學 2002 A 5.7 GHz interpolative VCO using InGaP/GaAs HBT technology Yu, Shih-An; Meng, Chin-Chun; Lu, Shey-Shi
國立成功大學 2003-12 A 5.7-GHz 0.18-mu m CMOS gain-controlled differential LNA with current reuse for WLAN receiver Chu, Yuan-Kai; Liao, Che-Hong; Chuang, Huey-Ru
東海大學 2009 A 5.7-GHz low-noise amplifier with source-degenerated active inductor Chu, C.-H., Huang, I.-L., Lin, Y.-H., Gong, J.
國立臺灣大學 2009 A 5.79 dB NF, 30-GHz-Band Monolithic LNA with 10 mW Power Consumption in Standard 0.18 μm CMOS Technology Chen, Chi-Chen; Lin, Yo-Sheng; Huang, Guo-Wei; Lu, Shey-Shi
國立暨南國際大學 2009 A 5.79-dB NF, 30-GHz-BAND MONOLITHIC LNA WITH 10 mW POWER CONSUMPTION IN STANDARD 0.18-mu m CMOS TECHNOLOGY? 陳志成?; Chen, CC
國立暨南國際大學 2009 A 5.79-dB NF, 30-GHz-BAND MONOLITHIC LNA WITH 10 mW POWER CONSUMPTION IN STANDARD 0.18-mu m CMOS TECHNOLOGY? 林佑昇?; Lin, YS
國立交通大學 2014-12-08T15:24:02Z A 5.79-Gb/s Energy-Efficient Multirate LDPC Codec Chip for IEEE 802.15.3c Applications Yen, Shao-Wei; Hung, Shiang-Yu; Chen, Chih-Lung; Chang, Hsie-Chia; Jou, Shyh-Jye; Lee, Chen-Yi
元智大學 2004-09 A 5.8 GHz Low-Power, Low-Phase-Noise CMOS LC VCO for IEEE 802.11a Applications 吳紹懋; 林昀賢
國立交通大學 2016-03-28T00:04:19Z A 5.8 mW Continuous-Time Delta Sigma Modulator With 20 MHz Bandwidth Using Time-Domain Flash Quantizer Chen, Zong-Yi; Hung, Chung-Chih
國立臺灣科技大學 2016 A 5.8-GHz CMOS low-power active mixer featuring high conversion gain and low LO driving power Chang, S.-H;Huang, J.-K;Tsneg, C.-H.
元智大學 2003-09 A 5.8-GHz CMOS VCO with Injection-locked frequency divider for IEEE 802.11a application 吳紹懋; 陳威良
元智大學 2003-08 A 5.8-GHz Fractional-N Frequency Synthesizer for IEEE 802.11a Application 吳紹懋; 陳威良; 林昀賢
國立臺灣科技大學 2011 A 5.8-GHz FREQUENCY SYNTHESIZER CHIP DESIGN FOR WORLDWIDE INTEROPERABILITY FOR MICROWAVE ACCESS APPLICATION Huang, J.F.;Shih, C.W.;Liu, R.Y.
國立臺灣科技大學 2014 A 5.8-GHz frequency synthesizer with dynamic current-matching charge pump linearization technique and an average varactor circuit Huang J.-F., Yang J.-L., Chen K.-L.
臺大學術典藏 2018-09-10T07:35:50Z A 5.8-GHz GaAs based HBT amplifier with novel RF ESD protection Huang, B.-J.;Lin, K.-Y.;Chiong, C.-C.;Wang, H.; Huang, B.-J.; Lin, K.-Y.; Chiong, C.-C.; Wang, H.; KUN-YOU LIN
元智大學 2003-06 A 5.8-GHz high efficient, low power, low phase noise CMOS VCO for IEEE 802.11a 吳紹懋; Ron-Yi Liu; Wei-Liang Chen
國立臺灣科技大學 2016 A 5.8-GHz radar sensor chip in 0.18-μm CMOS for non-contact vital sign detection Huang, J.-K;Tseng, C.-H.
國立臺灣大學 2002-06 A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-/spl mu/m CMOS technology Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang

显示项目 92106-92155 / 2346288 (共46926页)
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每页显示[10|25|50]项目