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顯示項目 461156-461165 / 2348487 (共234849頁)
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| 臺大學術典藏 |
1993-10 |
Hardware verification using symbolic state transition graphs
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Chen, Pin-Hong; Shyu, Jyuo-Min; Chen, Liang-Gee; Chen, Pin-hong; Shyu, Jyuo-Min; Chen, Liang-Gee |
| 臺大學術典藏 |
2020-06-11T06:29:41Z |
Hardware Verification Using Symbolic State Transition Graphs.
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Chen, Pinhong;Shyu, Jyuo-Min;Chen, Liang-Gee; Chen, Pinhong; Shyu, Jyuo-Min; Chen, Liang-Gee; LIANG-GEE CHEN |
| 臺大學術典藏 |
2021-09-21T23:19:35Z |
Hardware- And Memory-Efficient Architecture for Disparity Estimation of Large Label Counts
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Wu, Sih Sian; Chen, Hon Hui; LIANG-GEE CHEN |
| 臺大學術典藏 |
2020-05-04T08:04:29Z |
Hardware-accelerated cache simulation for multicore by FPGA
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Hung, S.-H.; Ho, Y.-M.; Yeh, C.-W.; Cheng-Yueh, Lee, C.-P.; SHIH-HAO HUNG |
| 臺大學術典藏 |
2018 |
Hardware-accelerated cache simulation for multicore by FPGA.
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SHIH-HAO HUNG; Lee, Chen-Pang; Liu, Cheng-Yueh; Yeh, Chih Wei; Ho, Yi-Mo; Hung, Shih-Hao |
| 朝陽科技大學 |
2019-08-23 |
Hardware-accelerated, Short-term Processing Voice and Nonvoice Sound Recognitions for Electric Equipment Control
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Tsai, Wen-Chung; Shih, You-Jyun; Huang, Nien-Ting |
| 臺大學術典藏 |
2020-12-16T03:02:45Z |
Hardware-Assisted MMU Redirection for In-Guest Monitoring and API Profiling
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Hsiao, S.-W.;Sun, Y.S.;Chen, M.C.; Hsiao, S.-W.; Sun, Y.S.; Chen, M.C.; YEALI SUN |
| 國立交通大學 |
2014-12-08T15:23:22Z |
Hardware-assisted Syntax Decoding Model for Software AVC/H.264 Decoders
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Wu, Ming-Ju; Chen, Yi-Tseng; Tsai, Chun-Jen |
| 國立交通大學 |
2019-04-02T06:00:27Z |
Hardware-Based Courseware for Teaching the Theory of Transmission Lines
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Tsai, Zuo-Min; Wang, Yu-Syuan |
| 國立成功大學 |
2023-09 |
Hardware-efficient algorithm and architecture design with memory and complexity reduction for semi-global matching
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Chang;Cheng-Tsung;Chen;Pin-Wei;Chin;Wen-Long;Chou;Shih-Hsiang;Yang;Yu-Hua |
顯示項目 461156-461165 / 2348487 (共234849頁)
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