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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 873066-873075 / 2348719 (共234872頁)
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每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:23:05Z |
Thermal-Aware Logic Block Placement for 3D FPGAs Considering Lateral Heat Dissipation
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Huang, Juinn-Dar; Huang, Ya-Shih; Hsu, Mi-Yu; Chang, Han-Yuan |
| 國立臺灣科技大學 |
2016 |
Thermal-aware MapReduce real-time scheduling in heterogeneous server systems
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Tang, Tang T.-C;Chen, Y.-S. |
| 元智大學 |
2015-08-04 |
Thermal-aware Memory Mapping for Three-dimensional Block-based SRAM Architecture
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Shu-Yen Lin; Cheng-Hung Lin; Ho-Yun Su |
| 國立臺灣科技大學 |
2012 |
Thermal-aware real-time task scheduling for three-dimensional multicore chip
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Tsai, T.-H.;Chen, Y.-S. |
| 臺大學術典藏 |
2020-06-16T06:36:16Z |
Thermal-aware router-sharing architecture for 3D network-on-chip designs
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Huang, Y.-R.;Pan, J.-H.;Lu, Y.-C.; Huang, Y.-R.; Pan, J.-H.; Lu, Y.-C.; YI-CHANG LU |
| 國立臺灣科技大學 |
2012 |
Thermal-aware service rate adjustment for cyber-physical systems
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Chu, H.-H.;Tsai, T.-H.;Chen, Y.-S. |
| 元智大學 |
2014-04-11 |
Thermal-aware task mapping for reconfigurable channel decoding
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Shu-Yen Lin; Cheng-Hung Lin; Ho-Yun Su |
| 元智大學 |
2014-08-05 |
Thermal-aware task mapping for three-dimensional reconfigurable channel decoding
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Shu-Yen Lin; Cheng-Hung Lin; Ho-Yun Su |
| 臺大學術典藏 |
2018-09-10T09:25:31Z |
Thermal-aware Test Schedule and TAM Co-Optimization for Three Dimensional IC
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C. J. Shih;C. Y. Hsu;C. Y. Kou;J. C. M. Li;J. C. Rau;K. Chakrabarty; C. J. Shih; C. Y. Hsu; C. Y. Kou; J. C. M. Li; J. C. Rau; K. Chakrabarty; CHIEN-MO LI |
| 淡江大學 |
2012-10-18 |
Thermal-Aware Test Schedule and TAM Co-Optimization for Three-Dimensional IC
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Shih, Chi-Jih; Hsu, Chih-Yao; Kuo, Chun-Yi; Li, James; Rau, Jiann-Chyi; Krishnendu Chakrabarty |
顯示項目 873066-873075 / 2348719 (共234872頁)
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每頁顯示[10|25|50]項目
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