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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 90656-90665 / 2348406 (共234841頁)
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每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:03:55Z |
A 0.5V 4.85Mbps Dual-Mode Baseband Transceiver with Extended Frequency Calibration for Biotelemetry Applications
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Yu, Jui-Yuan; Yu, Chien-Ying; Huang, Shang-Bin; Chen, Tsan-Wen; Chen, Juinn-Ting; Kuo, Kuan-Ling; Lee, Chen-Yi |
| 國立交通大學 |
2017-04-21T06:49:20Z |
A 0.5V/22 mu W Low Power Transceiver IC for Use in FSC Intra-body Communication System
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Tseng, Yuhwai; Lin, Tinyou; Yau, Songwen; Ho, Yingchieh; Su, Chauchin |
| 國立臺灣大學 |
2007 |
A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump
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Chuang, Chi-Nan; Liu, Shen-Iuan |
| 元智大學 |
2012-12 |
A 0.6 V 0.18 μm CMOS low noise amplifier for 2.4 GHz wireless communications
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Chien-Chang Huang; Kai-Wei Ku |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
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HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
A 0.6 V low-power 3.5 GHz CMOS low noise amplifier for WiMAX applications
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Jeng-Han Tsai; Yi-Jhang Lin; Hao-Chun Yu |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
A 0.6 V low-power 3.5 GHz CMOS low noise amplifier for WiMAX applications
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Jeng-Han Tsai; Yi-Jhang Lin; Hao-Chun Yu |
| 臺大學術典藏 |
2018-09-10T07:43:05Z |
A 0.6 V low-power wide-range delay-locked loop in 0.18 µm CMOS
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C.-T. Lu;H.-H. Hsieh;L.-H. Lu; C.-T. Lu; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU |
| 臺大學術典藏 |
2009 |
A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOS
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Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung; Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2009 |
A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOS
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Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
顯示項目 90656-90665 / 2348406 (共234841頁)
<< < 9061 9062 9063 9064 9065 9066 9067 9068 9069 9070 > >>
每頁顯示[10|25|50]項目
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