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顯示項目 91456-91465 / 2351396 (共235140頁)
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| 國立臺灣科技大學 |
2010 |
A 2.1 to 6 GHz Tunable-band LNA With Adaptive Frequency Responses by Transistor Size Scaling
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Wang, Y.H.;Lin, K.T.;Wang, T.;Chiu, H.W.;Chen, H.C.;Lu, S.S. |
| 國立交通大學 |
2014-12-08T15:23:13Z |
A 2.1-mu W 0.3V-1.0V Wide Locking Range Multiphase DLL Using Self-Estimated SAR Algorithm
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Chang, Yi-Ming; Chang, Ming-Hung; Hwang, Wei |
| 臺大學術典藏 |
2007-04-19T04:27:22Z |
A 2.17 dB NF, 5 GHz band monolithic CMOS LNA with 10 mW DC power consumption
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Lin, Yo-Sheng;Chiu, Hung-Wei;Lu, Shey-Shi; Chiu, Hung-Wei; Lu, Shey-Shi; Lin, Yo-Sheng |
| 國立臺灣大學 |
2002 |
A 2.17 dB NF, 5 GHz Band Monolithic CMOS LNA with 10 mW DC Power Consumption
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Chiu, Hong-Wei; Lu, Shey-Shi |
| 國立臺灣大學 |
2002-06 |
A 2.17 dB NF, 5 GHz band monolithic CMOS LNA with 10 mW DC power consumption
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Chiu, Hong-Wei; Lu, Shey-Shi |
| 臺大學術典藏 |
2018-09-10T08:15:38Z |
A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n system
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Chen, Y.-L.;Jheng, T.-J.;Zhan, C.-Z.;Wu, A.-Y.; Chen, Y.-L.; Jheng, T.-J.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 國立臺灣大學 |
2005-03 |
A 2.17-dB NF 5-GHz-Band Monolithic CMOS LNA With 10-mW DC Power Consumption
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Chiu, Hung-Wei; Lu, Shey-Shi; Lin, Yo-Sheng |
| 國立暨南國際大學 |
2005 |
A 2.17-dB NF 5-GHz-band monolithic CMOS LNA with 10-mW DC power consumption?
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林佑昇; Lin, YS |
| 國立交通大學 |
2020-10-05T02:01:08Z |
A 2.17-mW Acoustic DSP Processor With CNN-FFT Accelerators for Intelligent Hearing Assistive Devices
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Lee, Yu-Chi; Chi, Tai-Shih; Yang, Chia-Hsiang |
| 臺大學術典藏 |
2021-02-26T08:42:03Z |
A 2.17-mw acoustic dsp processor with cnn-fft accelerators for intelligent hearing assistive devices
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Lee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG |
顯示項目 91456-91465 / 2351396 (共235140頁)
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