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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 916701-916710 / 2348419 (共234842頁)
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每頁顯示[10|25|50]項目
| 臺大學術典藏 |
2019-10-24T07:57:17Z |
VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-based Communication Systems
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吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Chih-Hsiu Lin;Ching-Hua Wen;Jen-Chih Kuo; Jen-Chih Kuo; Ching-Hua Wen; Chih-Hsiu Lin; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇 |
| 國立臺灣師範大學 |
2019-09-03T10:49:33Z |
VLSI Design of Advanced Encryption Standard
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葉幸彰; Hsing-Chang Yeh |
| 國立中山大學 |
2000-08 |
VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking
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Shen-Fu Hsiao;Yor-Chin Tai;Kai-Hsiang Chang |
| 國立中山大學 |
2000-06 |
VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking
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Shen-Fu Hsiao; Yor-Chin Tai; Kai-Hsiang Chang |
| 國立成功大學 |
2019-01 |
VLSI Design of an Efficient Flicker-Free Video Defogging Method for Real-Time Applications
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Shiau;Yeu-Horng;Kuo;Yao-Tsung;Chen;Pei-Yin;Hsu;Feng-Yuan |
| 東方設計學院 |
2011-02 |
VLSI Design of an SVM Learning Core on Sequential Minimal Optimization Algorithm
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Kuan,; Ta-Wen; Wang, Jhing-Fa; Wang, Jia-Ching; Lin, Po-Chuan; Gu, Gaung-Hui; 林博川; (東方設計學院電子與資訊系) |
| 國立成功大學 |
2012-04 |
VLSI Design of an SVM Learning Core on Sequential Minimal Optimization Algorithm
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Kuan, Ta-Wen; Wang, Jhing-Fa; Wang, Jia-Ching; Lin, Po-Chuan; Gu, Gaung-Hui |
| 國立臺灣大學 |
1995-05 |
VLSI design of clustering analyser using systolic arrays
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Lai, M.F.; Nakano, M.; Wu, Y.P.; Hsieh, C.H. |
| 臺大學術典藏 |
2004-05 |
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP
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Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu; Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu |
| 國立臺灣大學 |
2004-05 |
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP
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Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu |
顯示項目 916701-916710 / 2348419 (共234842頁)
<< < 91666 91667 91668 91669 91670 91671 91672 91673 91674 91675 > >>
每頁顯示[10|25|50]項目
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