| 臺大學術典藏 |
2020-06-11T06:16:48Z |
A 0.3-V 7.6-fJ/conv-step delta-sigma time-to-digital converter with a gated-free ring oscillator
|
Chang, C.-K.;Tsai, Y.-K.;Cheng, K.-H.;Lu, L.-H.; Chang, C.-K.; Tsai, Y.-K.; Cheng, K.-H.; Lu, L.-H.; LIANG-HUNG LU |
| 國立交通大學 |
2015-07-21T08:29:40Z |
A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist
|
Lu, Chien-Yu; Chuang, Ching-Te; Jou, Shyh-Jye; Tu, Ming-Hsien; Wu, Ya-Ping; Huang, Chung-Ping; Kan, Paul-Sen; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin |
| 臺大學術典藏 |
2020-06-11T06:31:42Z |
A 0.33 V 683 μW K-band transformer-based receiver front-end in 65 nm CMOS technology
|
Cheng, J.-H.;Hsieh, C.-L.;Wu, M.-H.;Tsai, J.-H.;Huang, T.-W.; Cheng, J.-H.; Hsieh, C.-L.; Wu, M.-H.; Tsai, J.-H.; Huang, T.-W.; TIAN-WEI HUANG |
| 國立交通大學 |
2014-12-08T15:29:40Z |
A 0.33-V, 500-kHz, 3.94-mu W 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist
|
Lu, Chien-Yu; Tu, Ming-Hsien; Yang, Hao-I; Wu, Ya-Ping; Huang, Huan-Shun; Lin, Yuh-Jiun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立臺灣科技大學 |
2010 |
A 0.35 mu m CMOS divide-by-2 quadrature injection-locked frequency divider based on voltage-current feedback topology
|
Jang, S.L.;Liu, C.C.;Yang, R.K.;Shih, C.C.;Chang, C.W.;Yeh, H.A. |
| 國立交通大學 |
2017-04-21T06:55:34Z |
A 0.35 V, 375 kHz, 5.43 mu W, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line
|
Wu, Shang-Lin; Lu, Chien-Yu; Tu, Ming-Hsien; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te |
| 國立臺灣科技大學 |
2011 |
A 0.35-mu m CMOS CROSS-COUPLED COMPLEMENTARY COLPITTS VOLTAGE CONTROLLED OSCILLATOR
|
Jang, S.L.;Liu, W.C.;Chang, C.W.;Huang, J.F. |
| 國立臺灣科技大學 |
2010 |
A 0.35-mu m CMOS DIVIDE-BY-3 LC INJECTION-LOCKED FREQUENCY DIVIDER USING LINEAR MIXERS
|
Jang, S.L.;Chen, H.S.;Liu, C.C.;Juang, M.H. |
| 國立臺灣科技大學 |
2011 |
A 0.35-mu m CMOS FREQUENCY DIVIDER IMPLEMENTED WITH THE WAFFLE INJECTION MOSFET
|
Jang, S.L.;Cheng, C.L.;Chang, C.W.;Juang, M.H. |
| 國立臺灣科技大學 |
2008-04 |
A 0.35-um CMOS switched-inductor dual-band LC-tank frequency divider
|
Sheng-Lyang Jang;Che Yi Lin;Chien-Feng Lee |
| 國立臺灣科技大學 |
2008 |
A 0.35-um CMOS switched-inductor dual-band LC-tank frequency divider
|
Jang S.-L.; Che Y.L.; Lee C.-F. |
| 國立交通大學 |
2020-02-02T23:54:35Z |
A 0.35-V 240-W Fast-Lock and Low-Phase-Noise Frequency Synthesizer for Implantable Biomedical Applications
|
Wang, Shih-Hsing; Hung, Chung-Chih |
| 國立臺灣科技大學 |
2009-04 |
A 0.35?m CMOS divide-by-3 LC injection-locked frequency divider
|
Sheng-Lyang Jang;Chuang-Jen Huang;Cheng-Chen Liu |
| 元智大學 |
2016-08-02 |
A 0.35V, 500Mbps Digitalized LVDS driver in 0.18m CMOS technology
|
Shi-Fung Zhou; Hungwen Lin |
| 國立臺灣科技大學 |
2009 |
A 0.35弮m CMOS divide-by-3 LC injection-locked frequency divider
|
Jang S.-L.; Huang C.-J.; Liu C.-C. |
| 臺大學術典藏 |
2019-10-24T07:27:59Z |
A 0.38-V, sub-mW 5-GHz low noise amplifier with 43.6% bandwidth for next generation radio astronomical receivers in 90-nm CMOS
|
王暉;HUEI WANG;Huei Wang;Yu-Hsuan Lin;Chau-Ching Chiong;Ying Chen; Ying Chen; Chau-Ching Chiong; Yu-Hsuan Lin; Huei Wang; HUEI WANG; 王暉 |
| 國立交通大學 |
2020-07-01T05:22:04Z |
A 0.3V 10b 3MS/s SAR ADC With Comparator Calibration and Kickback Noise Reduction for Biomedical Applications
|
Wang, Shih-Hsing; Hung, Chung-Chih |
| 臺大學術典藏 |
2020-06-11T06:34:48Z |
A 0.3V 10bit 7.3fJ/conversion-step SAR ADC in 0.18μm CMOS
|
Hsieh, C.-E.;Liu, S.-I.; Hsieh, C.-E.; Liu, S.-I.; SHEN-IUAN LIU |
| 淡江大學 |
2012-07-15 |
A 0.3V 1kb Sub-Threshold SRAM for Ultra-Low-Power Application in 90nm CMOS
|
Yang, Wei-Bin |
| 元智大學 |
2020/7/28 |
A 0.3V, 625Mbps LVDS Driver in 0.18um CMOS Technology
|
Hungwen Lin; Tzu-Hao Lin |
| 臺大學術典藏 |
2018-09-10T08:15:03Z |
A 0.4-6 GHz variable-gain driver amplifier for software-defined radio
|
Lin, K.-T.; Chen, H.-K.; Wang, T.; Lu, S.-S.; SHEY-SHI LU |
| 國立成功大學 |
2022 |
A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual- Aliasing Reduction
|
Qiu, Y.-Z.;Chien, S.-H.;Kuo, T.-H. |
| 國立成功大學 |
2022-02 |
A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual-Aliasing Reduction
|
Qiu;Yi-Zhi;Chien;Shih-Hsiung;Kuo;Tai-Haur |
| 國立成功大學 |
2020 |
A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction
|
Chien, S.-H.;Kuo, T.-H.;Huang, Huang H.-Y.;Wang, H.-B.;Qiu, Y.-Z. |
| 國立交通大學 |
2017-04-21T06:48:47Z |
A 0.42V Vccmin ASIC-Compatible Pulse-Latch Solution as a Replacement for a Traditional Master-Slave Flip-Flop in a Digital SOC
|
Dhong, Sang; Guo, Richard; Kuo, Ming-Zhang; Yang, Ping-Lin; Lin, Cheng-Chung; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
