| 國立交通大學 |
2014-12-08T15:03:55Z |
A 0.5V 4.85Mbps Dual-Mode Baseband Transceiver with Extended Frequency Calibration for Biotelemetry Applications
|
Yu, Jui-Yuan; Yu, Chien-Ying; Huang, Shang-Bin; Chen, Tsan-Wen; Chen, Juinn-Ting; Kuo, Kuan-Ling; Lee, Chen-Yi |
| 國立交通大學 |
2017-04-21T06:49:20Z |
A 0.5V/22 mu W Low Power Transceiver IC for Use in FSC Intra-body Communication System
|
Tseng, Yuhwai; Lin, Tinyou; Yau, Songwen; Ho, Yingchieh; Su, Chauchin |
| 國立臺灣大學 |
2007 |
A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump
|
Chuang, Chi-Nan; Liu, Shen-Iuan |
| 元智大學 |
2012-12 |
A 0.6 V 0.18 μm CMOS low noise amplifier for 2.4 GHz wireless communications
|
Chien-Chang Huang; Kai-Wei Ku |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
A 0.6 V low-power 3.5 GHz CMOS low noise amplifier for WiMAX applications
|
Jeng-Han Tsai; Yi-Jhang Lin; Hao-Chun Yu |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
A 0.6 V low-power 3.5 GHz CMOS low noise amplifier for WiMAX applications
|
Jeng-Han Tsai; Yi-Jhang Lin; Hao-Chun Yu |
| 臺大學術典藏 |
2018-09-10T07:43:05Z |
A 0.6 V low-power wide-range delay-locked loop in 0.18 µm CMOS
|
C.-T. Lu;H.-H. Hsieh;L.-H. Lu; C.-T. Lu; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU |
| 臺大學術典藏 |
2009 |
A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOS
|
Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung; Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2009 |
A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOS
|
Lu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 臺大學術典藏 |
2020-06-11T06:16:55Z |
A 0.6 v low-power wide-range delay-locked loop in 0.18 μm CMOS
|
Lu, C.-T.;Hsieh, H.-H.;Lu, L.-H.; Lu, C.-T.; Hsieh, H.-H.; Lu, L.-H.; LIANG-HUNG LU |
| 國立交通大學 |
2015-07-21T08:28:48Z |
A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement
|
Chiu, Chao-Chang; Huang, Po-Hsien; Lin, Moris; Chen, Ke-Horng; Lin, Ying-Hsi; Tsai, Tsung-Yen; Lee, Chen Chao-Cheng |
| 國立交通大學 |
2015-07-21T08:31:28Z |
A 0.6 V, 1.66mW Energy Harvester and Audio Driver for Tympanic Membrane Transducer with Wirelessly Optical Signal and Power Transfer
|
Jian, Jhong-Ting; Song, Yu-Lin; Lee, Chia-Fone; Chou, Yuan-Fang; Cheni, Wei-Zen |
| 國立臺灣大學 |
2008 |
A 0.6 V, 4.32 mW, 68 GHz Low Phase-Noise VCO With Intrinsic-Tuned Technique in 0.13 μm CMOS
|
Chen, Hsien-Ku; Chen, Hsien-Jui; Chang, Da-Chiang; Juang, Ying-Zong; Lu, Shey-Shi |
| 臺大學術典藏 |
2003-06 |
A 0.6-22-GHz broadband CMOS distributed amplifier
|
Liu, Ren-Chieh; Deng, Kuo-Liang; Wang, Huei; Liu, Ren-Chieh; Deng, Kuo-Liang; Wang, Huei |
| 國立臺灣大學 |
2003-06 |
A 0.6-22-GHz broadband CMOS distributed amplifier
|
Liu, Ren-Chieh; Deng, Kuo-Liang; Wang, Huei |
| 臺大學術典藏 |
2022-03-22T15:04:56Z |
A 0.6-dB Low Loss and 3-165 GHz Wideband Phase Difference Sub-THz Coupler in 0.18-μm CMOS
|
Chang, Yu Hsiang; Hsieh, Cheng Hung; Cheng, Shi Peng; Li, Yiming; Samukawa, Seiji; TZONG-LIN WU; Tsai, Zuo Min |
| 國立交通大學 |
2014-12-08T15:32:53Z |
A 0.6-V 0.33-mW 5.5-GHz Receiver Front-End Using Resonator Coupling Technique
|
Li, Chun-Hsing; Liu, Yen-Lin; Kuo, Chien-Nan |
| 臺大學術典藏 |
2020-08-05T02:45:27Z |
A 0.6-V 0.33-mW 5.5-GHz receiver front-end using resonator coupling technique
|
CHUN-HSING LI; Chun-Hsing Li;Yen-Lin Liu;and Chien-Nan Kuo;CHUN-HSING LI; Chun-Hsing Li; Yen-Lin Liu; and Chien-Nan Kuo; CHUN-HSING LI |
| 國立交通大學 |
2014-12-08T15:22:05Z |
A 0.6-V 30 GHz CMOS Quadrature VCO Using Microwave 1:1:1 Trifilar Transformer
|
Syu, Jin-Siang; Lu, Hsi-Liang; Meng, Chinchun |
| 臺大學術典藏 |
2020-06-11T06:31:43Z |
A 0.6-V 336-μW 5-GHz LNA using a low-voltage and gain-enhancement architecture
|
Hsieh, C.-L.;Wu, M.-H.;Cheng, J.-H.;Tsai, J.-H.;Huang, T.-W.; Hsieh, C.-L.; Wu, M.-H.; Cheng, J.-H.; Tsai, J.-H.; Huang, T.-W.; TIAN-WEI HUANG |
| 臺大學術典藏 |
2020-06-11T06:16:54Z |
A 0.6-V delta-sigma ADC wih 57-dB dynamic range
|
Wei, C.-H.;Lu, L.-H.; Wei, C.-H.; Lu, L.-H.; LIANG-HUNG LU |
| 臺大學術典藏 |
2018-09-10T08:19:08Z |
A 0.6-V delta-sigma ADC with 57-dB dynamic range
|
C.-H. Wei;L.-H. Lu; C.-H. Wei; L.-H. Lu; LIANG-HUNG LU |
| 國立臺灣科技大學 |
2010 |
A 0.6-V LOW-POWER ARMSTRONG VCO IN 0.18 mu M CMOS
|
Liu, C.C.;Jang, S.L.;Chen, J.J.;Juang, M.H. |
| 臺大學術典藏 |
2019-10-31T07:12:34Z |
A 0.6V 1.63fJ/c.-s. Detective Open-Loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System
|
HSIN-SHU CHEN;Hsin-Shu Chen;Li-Yu Huang;Yao-Sheng Hu; Yao-Sheng Hu; Li-Yu Huang; Hsin-Shu Chen; HSIN-SHU CHEN |
