| 國立交通大學 |
2019-04-02T06:04:47Z |
A 188-size 2.1mm(2) Reconfigurable Turbo Decoder Chip with Parallel Architecture for 3GPP LTE System
|
Wong, Cheng-Chi; Lee, Yung-Yu; Chang, Hsie-Chia |
| 臺大學術典藏 |
2018-09-10T15:00:40Z |
A 19 GHz CMOS signal generator for 77 GHz FMCW radars
|
Y.-K. Hsieh;L.-H. Lu; Y.-K. Hsieh; L.-H. Lu; LIANG-HUNG LU |
| 臺大學術典藏 |
2020-06-11T06:16:49Z |
A 19 GHz CMOS signal generator for 77 GHz FMCW radars
|
Hsieh, Y.-K.;Lu, L.-H.; Hsieh, Y.-K.; Lu, L.-H.; LIANG-HUNG LU |
| 臺大學術典藏 |
2021-09-02T00:04:57Z |
A 19 GHz Vector-Sum Phase Shifter Using Active Current-Mode Coupler and Bi-phase Modulator for Satellite Communication
|
Chang Y.-T;Wang W.-Y;Lu H.-C.; Chang Y.-T; Wang W.-Y; Lu H.-C.; HSIN-CHIA LU |
| 臺大學術典藏 |
2021-11-21T23:19:07Z |
A 19-GHz 5-Bit Switch-Type Phase Shifter Design Using Phase Compensation Techniques
|
Liang, You Jen; Chiang, Kun Chan; Lin, Yi Hsien; Alsuraisry, Hamed; Tsai, Jeng Han; TIAN-WEI HUANG |
| 臺大學術典藏 |
2018-09-10T06:31:52Z |
A 19-mode 8.29mm2 52-mW LDPC decoder chip for IEEE 802.16e system
|
Shih, X.-Y.; Zhan, C.-Z.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 國立中山大學 |
2005-11 |
A 19-T full adder with high impedance circuits and conflict circuits for mobile devices’ controllers
|
C.C. Wang;Y.L. Tseng;Y.S. Chang |
| 國立交通大學 |
2019-12-13T01:12:53Z |
A 19.1% PAE, 22.4-dBm 53-GHz Parallel Power Combining Power Amplifier with Stacked-FET Techniques in 90-nm CMOS
|
Sun, Wei-Che; Kuo, Chien-Nan |
| 臺大學術典藏 |
2021-12-21T23:17:04Z |
A 19.7-38.9-GHz Ultrabroadband PA With Phase Linearization for 5G in 28-nm CMOS Process
|
TIAN-WEI HUANG; Yen, Ho Ching; Tsai, Jeng Han; Bai, Wei Ting; Hung, Jui Cheng; Liang, You Jen |
| 臺大學術典藏 |
2018-09-10T14:57:24Z |
A 190-GHz amplifier with gain-boosting technique in 65-nm CMOS
|
Siao, D.-S.;Kao, J.-C.;Hsiao, Y.-H.;Hsu, Y.-W.;Teng, Y.-M.;Huang, G.-W.;Lin, K.-Y.;Wang, H.; Siao, D.-S.; Kao, J.-C.; Hsiao, Y.-H.; Hsu, Y.-W.; Teng, Y.-M.; Huang, G.-W.; Lin, K.-Y.; Wang, H.; KUN-YOU LIN |
| 臺大學術典藏 |
2020-06-04T07:54:10Z |
A 190-GHz amplifier with gain-boosting technique in 65-nm CMOS
|
Siao, D.-S.;Kao, J.-C.;Hsiao, Y.-H.;Hsu, Y.-W.;Teng, Y.-M.;Huang, G.-W.;Lin, K.-Y.;Wang, H.; Siao, D.-S.; Kao, J.-C.; Hsiao, Y.-H.; Hsu, Y.-W.; Teng, Y.-M.; Huang, G.-W.; Lin, K.-Y.; Wang, H.; HUEI WANG |
| 臺大學術典藏 |
2018-09-10T09:48:03Z |
A 191μW BPSK demodulator for data and power telemetry in biomedical implants
|
Wang, L.-L.;Yang, C.-H.;Chiueh, H.; Wang, L.-L.; Yang, C.-H.; Chiueh, H.; CHIA-HSIANG YANG |
| 臺大學術典藏 |
2018-09-10T15:18:27Z |
A 1920×1080 30fps 611 mW five-view depth-estimation processor for light-field applications
|
Chen, L.-G.; LIANG-GEE CHEN; Chen, H.-H.;Huang, C.-T.;Wu, S.-S.;Hung, C.-L.;Ma, T.-C.;Chen, L.-G.; Chen, H.-H.; Huang, C.-T.; Wu, S.-S.; Hung, C.-L.; Ma, T.-C. |
| 臺大學術典藏 |
2018-09-10T08:18:17Z |
A 198.9GHz ~201.0GHz injection-locked frequency divider in 65nm CMOS
|
Bo-Yu Lin;I-Ting Lee;Chiao-Hsing Wang;Shen-Iuan Liu; Bo-Yu Lin; I-Ting Lee; Chiao-Hsing Wang; Shen-Iuan Liu; SHEN-IUAN LIU |
| 臺大學術典藏 |
2018-09-10T15:20:07Z |
A 1D Electrospun Nanofiber Channel for Organic Field-Effect Transistors Using a Donor/Acceptor Planar Heterojunction Architecture
|
WEN-CHANG CHEN; Chen, W.-C.; Liu, C.-L.; Shih, C.-C.; Chang, H.-C. |
| 臺大學術典藏 |
2020-01-14T03:34:04Z |
A 1D–2D coupled SPH-SWE model applied to open channel flow simulations in complicated geometries
|
Chang K.-H.;Sheu T.W.-H.;Chang T.-J.; Chang K.-H.; Sheu T.W.-H.; Chang T.-J.; TSANG-JUNG CHANG |
| 臺大學術典藏 |
2020-01-17T07:47:28Z |
A 1D�V2D coupled SPH-SWE model applied to open channel flow simulations in complicated geometries
|
TONY W. H. SHEU; Chang, T.-J.; Chang, K.-H.; Sheu, T.W.-H. |
| 國立臺灣大學 |
2004-05 |
A 1V 4.2mW fully integrated 2.5Gb/s CMOS limiting amplifier using folded active inductors
|
Wu, Chia-Hsin; Liao, Jieh-Wei; Liu, Shen-Iuan |
| 臺大學術典藏 |
2018-09-10T03:50:27Z |
A 1V 5.8GHz CMOS Low Noise Amplifier in a 0.35um CMOS Process
|
Chih-Chun Tang; Shen-Iuan Liu; SHEN-IUAN LIU |
| 國立臺灣大學 |
2002 |
A 1V 5.8GHz low noise amplifier in a 0.35um standard CMOS process
|
Tang, Chih-Chun; Liu, Shen-Iuan |
| 國立臺灣大學 |
2006 |
A 1V 50 GHz Digital-Controlled CMOS Frequency Divider
|
Bai, Shuen-Yin; Luo, Tang-Nian; Chen, Yi-Jan Emery |
| 臺大學術典藏 |
2018-09-10T05:51:54Z |
A 1V 50 GHz digital-controlled CMOS frequency divider
|
Bai, S.-Y.; Luo, T.-N.; Chen, Y.-J.E.; YI-JAN EMERY CHEN |
| 淡江大學 |
2006-08 |
A 1V 82dB Multibit Delta-Sigma Modulator
|
Kuo, Chien-Hung; Chang, Kang-Shuo; Jian, Jing-Shan |
| 國立臺灣師範大學 |
2014-10-30T09:28:40Z |
A 1V 82dB Multibit Delta-Sigma Modulator
|
Chien-Hung Kuo; Kang-Shuo Chang; Jing-Shan Jian |
| 國立臺灣師範大學 |
2014-10-30T09:28:40Z |
A 1V 82dB Multibit Delta-Sigma Modulator
|
Chien-Hung Kuo; Kang-Shuo Chang; Jing-Shan Jian |
