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Showing items 91041-91050 of 2348406 (234841 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T09:42:59Z |
A 1062Mpixels/s 8192×4320p High Efficiency Video Coding (H.265) encoder chip
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Tsai, S.-F.;Li, C.-T.;Chen, H.-H.;Tsung, P.-K.;Chen, K.-Y.;Chen, L.-G.; Tsai, S.-F.; Li, C.-T.; Chen, H.-H.; Tsung, P.-K.; Chen, K.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2020-06-11T06:20:58Z |
A 10b 100MS/s 4.5mW pipelined ADC with a time sharing technique
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Huang, Y.-C.;Lee, T.-C.; Huang, Y.-C.; Lee, T.-C.; TAI-CHENG LEE |
| 國立臺灣科技大學 |
2018 |
A 10b 160-MS/s domino-SAR ADC in 90nm CMOS
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Chung, Y.-H.;Yeh, H.-C.;Chang, Chang C.-W. |
| 臺大學術典藏 |
2018-09-10T08:14:07Z |
A 10b 320MS/s self-calibrated pipeline ADC
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Chen, H.-W.;Shen, W.-T.;Cheng, W.-C.;Chen, H.-S.; Chen, H.-W.; Shen, W.-T.; Cheng, W.-C.; Chen, H.-S.; HSIN-SHU CHEN |
| 國立交通大學 |
2014-12-08T15:35:18Z |
A 10Bit, 10MS/s, Low Power Cyclic ADC
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Chen, Chien-Hung; Chen, Wei-Zen |
| 淡江大學 |
2005 |
A 10bits low power digital-to-analog converter
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蔡仁杰; Tsai, Jen-chieh |
| 國立交通大學 |
2019-04-03T06:47:15Z |
A 10G QoS-enabled optical packet-switching system: Technology and experimentation
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Lee, Steven S. W.; Yuang, Maria C.; Tien, Po-Lung; Lin, Yu-Min; Shih, Julin; Chen, Jason J. |
| 國立交通大學 |
2015-07-21T08:31:16Z |
A 10Gb/s 44.2 dB Adaptive Equalizer with Duobinary Tracking Loop in 0.18 mu m CMOS
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Chang, Po-Hsuan; Li, An-Siou; Tsai, Chia-Ming |
| 臺大學術典藏 |
2018-09-10T07:41:57Z |
A 10Gb/s inductorless CMOS analog equalizer with interleaved active feedback topology
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Jian-Hao Lu;Ke-Hou Chen;Shen-Iuan Liu; Jian-Hao Lu; Ke-Hou Chen; Shen-Iuan Liu; SHEN-IUAN LIU |
| 臺大學術典藏 |
2018-09-10T07:42:01Z |
A 10Gb/s inductorless quarter-rate clock and data recovery circuit in 0.13um CMOS
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Hong-Lin Chu, Chang-Lin Hsieh;Shen-Iuan Liu; Hong-Lin Chu, Chang-Lin Hsieh; Shen-Iuan Liu; SHEN-IUAN LIU |
Showing items 91041-91050 of 2348406 (234841 Page(s) Totally)
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