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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T09:22:32Z	A 1.2 V 15–32?GHz low-power single-balanced gate mixer with a miniature rat-race hybrid	Chung-Chun Chen;Chun-Hsien Lien;Hen-Wai Tsao;Huei Wang; Chung-Chun Chen; Chun-Hsien Lien; Hen-Wai Tsao; Huei Wang; HEN-WAI TSAO; HUEI WANG
國立成功大學	2018-05-29	A 1.2 V 490 μW Sub-GHz UWB CMOS LNA with Current Reuse Negative Feedback	Chen, Wei-Wei; Yang, Shang-De; Cheng, Kuang-Wei
國立成功大學	2018	A 1.2 v 490 μw Sub-GHz UWB CMOS LNA with Current Reuse Negative Feedback	Chen, W.-W.;Yang, S.-D.;Cheng, K.-W.
淡江大學	2001-09	A 1.2 V 500 MHz 32-bit carry-lookahead adder	鄭國興; Cheng, Kuo-hsing; Lee, Wen-shiuan; Huang, Yung-chong
國立交通大學	2014-12-08T15:27:23Z	A 1.2 V CMOS four-quadrant analog multiplier	Hsiao, SY; Wu, CY
淡江大學	1996-10-13	A 1.2 V CMOS multiplier using low-power current-sensing complementary pass-transistor logic	鄭國興; Cheng, Kuo-hsing; Yee, Liow yu
淡江大學	1997-12-15	A 1.2 V low-power TSPC complementary pass transistor logic	鄭國興; Cheng, Kuo-hsing; Chen, Jian-hung
國立成功大學	2002-09	A 1.2 V rail-to-rail analog CMOS rank-order filter with k-WTA capability	Hung, Yu-Cherng; Liu, Bin-Da
國立臺灣大學	2007	A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13- μm CMOS Technology	Cho, Lan-Chou; Lee, Chihun; Liu, Shen-Iuan
國立交通大學	2014-12-08T15:28:31Z	A 1.2-V 5.2-mW 20-30-GHz Wideband Receiver Front-End in 0.18-mu m CMOS	Li, Chun-Hsing; Kuo, Chien-Nan; Kuo, Ming-Ching

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