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教育部委托研究计画 计画执行:国立台湾大学图书馆
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显示项目 915376-915385 / 2346260 (共234626页)
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每页显示[10|25|50]项目
| 中華大學 |
2006 |
VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters
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謝曜式; Shieh, Yaw-Shih |
| 中原大學 |
2001-10-11 |
VLSI CAD中一些最佳化問題之研究
|
林佑政; Yu-Chung Lin |
| 中原大學 |
1989 |
VLSI CAD數位語音系統之設計
|
王如生; WANG, RU-SHENG |
| 國立交通大學 |
2014-12-08T15:03:00Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes
|
Chang, RI; Hsiao, PY |
| 臺大學術典藏 |
2018-09-10T05:24:37Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes
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RAY-I CHANG;HSIAO, PY;CHANG, RI; CHANG, RI; HSIAO, PY; RAY-I CHANG |
| 國立交通大學 |
2014-12-08T15:01:53Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes - Comments
|
Huang, KY |
| 國立中山大學 |
2001-09 |
VLSI circuit design of 16-Mbps IrDA VFIR transceivers
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C.C. Wang;C.W. Chen;Y.L. Huang |
| 國立交通大學 |
2014-12-08T15:01:29Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
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Chang, RI; Hsiao, PY |
| 國立交通大學 |
2019-04-02T05:59:32Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
|
Chang, RI; Hsiao, PY |
| 臺大學術典藏 |
2018-09-10T06:32:26Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
|
RAY-I CHANG;HSIAO, PY;CHANG, RI; CHANG, RI; HSIAO, PY; RAY-I CHANG |
显示项目 915376-915385 / 2346260 (共234626页)
<< < 91533 91534 91535 91536 91537 91538 91539 91540 91541 91542 > >>
每页显示[10|25|50]项目
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