| 國立臺灣科技大學 |
2016 |
A 5-b 1-GS/s 2.7-mW binary-search ADC in 90nm digital CMOS
|
Chung, Y.-H.;Tsai, C.-H.;Yeh, H.-C. |
| 國立臺灣科技大學 |
2017 |
A 5-b 1-GS/s binary-search ADC in 90nm CMOS
|
Chung, Y.-H;Tsai, C.-H;Yeh, H.-C. |
| 國立臺灣科技大學 |
2017 |
A 5-bit 1-GS/s binary-search ADC in 90-nm CMOS
|
Chung, Y.-H;Tsai, C.-H;Yeh, H.-C. |
| 國立成功大學 |
2009-02 |
A 5-bit 4.2-GS/s Flash ADC in 0.13-mu m CMOS Process
|
Lin, Ying-Zu; Chang, Soon-Jyh; Liu, Yen-Ting |
| 臺大學術典藏 |
2021-04-22T08:10:01Z |
A 5-bit 400-MS/s time domain flash ADC in 0.18-�gm CMOS
|
Lin, Y.-C.; Tsao, H.-W.; HEN-WAI TSAO |
| 國立成功大學 |
2019-12 |
A 5-Degrees-of-Freedom Lightweight Elbow-Wrist Exoskeleton for Forearm Fine-Motion Rehabilitation
|
Wu;Kuan-Yi;Su;Yin-Yu;Yu;Ying-Lung;Lin;Ching-Hui;Lan;Chao-Chieh |
| 國立臺灣大學 |
2007-01 |
A 5-gene signature and clinical outcome in non-small-cell lung cancer
|
Chen, H.-Y.; Yu, S.-L.; Chen, C.-H.; Chang, G.-C.; Chen, C.-Y.; Chen, W.J.; Chen, J.J.W.; Yang, P.-C. |
| 國立交通大學 |
2014-12-08T15:26:22Z |
A 5-GHz CMOS double-quadrature receiver for IEEE 802.11a applications
|
Wu, CY; Chou, CY |
| 國立交通大學 |
2014-12-08T15:39:31Z |
A 5-GHz CMOS double-quadrature receiver front-end with single-stage quadrature generator
|
Wu, CY; Chou, CY |
| 國立臺灣大學 |
2009 |
A 5-GHz CMOS Frequency Synthesizer With an Injection-Locked Frequency Divider and Differential Switched Capacitors
|
Deng, P.-Y.; Kiang, J.-F. |
| 元智大學 |
2004-05 |
A 5-GHZ delta-sigma PLL frequency synthesizer for WLAN applications
|
吳紹懋; 陳威良 |
| 國立交通大學 |
2014-12-08T15:09:31Z |
A 5-GHz Differential Low-Noise Amplifier With High Pin-to-Pin ESD Robustness in a 130-nm CMOS Process
|
Hsiao, Yuan-Wen; Ker, Ming-Dou |
| 義守大學 |
2009-05 |
A 5-GHz Differential Low-Noise Amplifier With High Pin-to-Pin ESD Robustness in a 130-nm CMOS Process
|
Yuan-Wen Hsiao;Ming-Dou Ker |
| 臺大學術典藏 |
2018-09-10T04:36:04Z |
A 5-GHz Direct-Conversion CMOS Transceiver Utilizing Automatic Frequency Control for the IEEE 802.11a Wireless LAN Standard
|
Z.M. Shi; S. An; ; L. Lin; K. Carter; M. Kappes; Tsung-Hsien (Eric) Lin; T. Nguyen; D. Yuan; S. Wu; Y.C. Wang; V. Fong; A. Rofougaran; A. Behzad; TSUNG-HSIEN LIN et al. |
| 國立交通大學 |
2014-12-08T15:25:38Z |
A 5-GHz direct-conversion receiver with I/Q phase and gain error calibration
|
Chen, WZ; Lee, TL; Lu, TY |
| 臺大學術典藏 |
2020-06-11T06:26:18Z |
A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS
|
Chiu, W.-H.;Cheng, C.-Y.;Lin, T.-H.; Chiu, W.-H.; Cheng, C.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
|
陳志成?; Chen, CC |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
|
陳世璋?; Chen, CZ |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
|
方浩宇?; Fang, HY |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
|
林佑昇?; Lin, YS |
| 國立臺灣大學 |
2005 |
A 5-GHz low phase noise differential Colpitts CMOS VCO
|
Tsai, Ming-Da; Cho, Yi-Hsien; Wang, Huei |
| 臺大學術典藏 |
2018-09-10T08:19:11Z |
A 5-GHz Relative-Phase Cancellation Fractional-N Phase-Locked Loops in 0.13-μm CMOS
|
W.-H. Chiu;C.-Y. Cheng;T.-H. Lin; W.-H. Chiu; C.-Y. Cheng; T.-H. Lin; TSUNG-HSIEN LIN |
| 國立交通大學 |
2017-04-21T06:48:54Z |
A 5-GHz, 30-dBm, 0.9-dB insertion loss single-pole double-throw T/R switch in 90nm CMOS
|
Fu, Chang-Tsung; Taylor, Stewart S.; Ku, Chien-Nan |
| 國立臺灣科技大學 |
2009-04 |
A 5-GHz-Band CMOS Receiver With Low LO Self-Mixing Front End
|
Hsiao-Chin Chen;Tao Wang;Hung-Wei Chiu;Yu-Che Yang;Tze-Huei Kao;Guo-Wei Huang;Shey-Shi Lu |
| 國立臺灣大學 |
2009 |
A 5-GHz-Band CMOS Receiver with Low LO-Self-Mixing Front-end
|
Chen,Hsiao-Chin; Wang, Tao; Chiu, Hung-Wei; Yang, Yu-Che; Kao, Tze-Huei; Huang, Guo-Wei; Lu, Shey-Shi |
