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顯示項目 91021-91030 / 2346275 (共234628頁)
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| 臺大學術典藏 |
2021-03-12T08:41:01Z |
A 100GHz phase-locked loop in 0.13μm SiGe BiCMOS process
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JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN |
| 臺大學術典藏 |
2004 |
A 100MHz timing generator for impulse radio applications
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Wu, C.-P.; Tsao, H.-W.; HEN-WAI TSAO |
| 國立高雄師範大學 |
2006-05 |
A 100MHz-1GHz Adaptive Bandwidth Phase-Locked Loop in 90nm Process
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Kuo-Hsing Cheng;Kai-Fei Chang;Yu-Lung Lo;Ching-Wen Lai;Yuh-Kuang Tseng; 羅有龍 |
| 國立交通大學 |
2019-05-02T00:26:47Z |
A 100W and 91% GaN-Based Class-E Wireless-Power-Transfer Transmitter with Differential-Impedance-Matching Control for Charging Multiple Devices
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Xie, Cheng-Yu; Yang, Shang-Hsien; Lu, Shen-Fu; Lin, Fa-Yi; Lin, Yen-An; Ou-Yang, You-Zheng; Chen, Ke-Horng; Liu, Kuo-Chi; Lin, Yin-Hsi |
| 國立臺灣大學 |
2009 |
A 104- to 112.8-GHz CMOS Injection-Locked Frequency Divider
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Lee, I-Ting; Tsai, Kun-Hung; Liu, Shen-Iuan |
| 臺大學術典藏 |
2018-09-10T09:24:57Z |
A 104GHz phase-locked loop using a VCO at second pole frequency
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Kun-Hung Tsai;Shen-Iuan Liu; Kun-Hung Tsai; Shen-Iuan Liu; SHEN-IUAN LIU |
| 臺大學術典藏 |
2018-09-10T09:42:59Z |
A 1062Mpixels/s 8192×4320p High Efficiency Video Coding (H.265) encoder chip
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Tsai, S.-F.;Li, C.-T.;Chen, H.-H.;Tsung, P.-K.;Chen, K.-Y.;Chen, L.-G.; Tsai, S.-F.; Li, C.-T.; Chen, H.-H.; Tsung, P.-K.; Chen, K.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2020-06-11T06:20:58Z |
A 10b 100MS/s 4.5mW pipelined ADC with a time sharing technique
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Huang, Y.-C.;Lee, T.-C.; Huang, Y.-C.; Lee, T.-C.; TAI-CHENG LEE |
| 國立臺灣科技大學 |
2018 |
A 10b 160-MS/s domino-SAR ADC in 90nm CMOS
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Chung, Y.-H.;Yeh, H.-C.;Chang, Chang C.-W. |
| 臺大學術典藏 |
2018-09-10T08:14:07Z |
A 10b 320MS/s self-calibrated pipeline ADC
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Chen, H.-W.;Shen, W.-T.;Cheng, W.-C.;Chen, H.-S.; Chen, H.-W.; Shen, W.-T.; Cheng, W.-C.; Chen, H.-S.; HSIN-SHU CHEN |
顯示項目 91021-91030 / 2346275 (共234628頁)
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