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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 91066-91075 / 2351377 (共235138頁)
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每頁顯示[10|25|50]項目
| 臺大學術典藏 |
2020-06-11T06:21:01Z |
A 10-bit piplined A/D converter with split calibration and opamp-sharing technique
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TAI-CHENG LEE; Lee, T.-C.; Huang, Y.-C.; Hung, L.-H.; Hung, L.-H.;Huang, Y.-C.;Lee, T.-C. |
| 國立暨南國際大學 |
2012 |
A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs
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林佑昇; Lin, YS |
| 國立成功大學 |
2003-04-30 |
A 10-fold improvement in the precision of boron isotopic analysis by negative thermal ionization mass spectrometry
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Shen, Jason Jiun-San; You, Chen-Feng |
| 臺大學術典藏 |
2018-09-10T09:50:32Z |
A 10-Gb/s adaptive parallel receiver with joint XTC and DFE using power detection
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Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU |
| 臺大學術典藏 |
2021-04-22T08:10:02Z |
A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS
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Lin, Y.-C.; Tsao, H.-W.; HEN-WAI TSAO |
| 國立臺灣大學 |
2009 |
A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology
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Lu, Jian-Hao; Chen, Ke-Hou; Liu, Shen-Iuan |
| 臺大學術典藏 |
2020-06-11T06:34:53Z |
A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology (vol 56, pg 97, 2009)
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Lu, Jian-Hao;Chen, Ke-Hou;Liu, Shen-Iuan; Lu, Jian-Hao; Chen, Ke-Hou; Liu, Shen-Iuan; SHEN-IUAN LIU |
| 國立臺灣大學 |
2007 |
A 10-Gb/s inductorless CMOS limiting amplifier with third-order interleaving active feedback
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Huang, Huei-Yan; Chien, Jun-Chau; Lu, Liang-Hung |
| 臺大學術典藏 |
2021-03-12T08:41:03Z |
A 10-Gb/s Inductorless CMOS Limiting Amplifier with Third-Order Interleaving Active Feedback
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JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN |
| 國立交通大學 |
2014-12-08T15:25:38Z |
A 10-Gb/s laser diode driver in 0.35 mu m BiCMOS technology
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Wang, TY; Chen, WZ; Tsai, CM; Huang, LR; Li, DU |
顯示項目 91066-91075 / 2351377 (共235138頁)
<< < 9102 9103 9104 9105 9106 9107 9108 9109 9110 9111 > >>
每頁顯示[10|25|50]項目
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