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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 91626-91635 / 2348419 (共234842頁)
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每頁顯示[10|25|50]項目
| 大葉大學 |
2010-07-20 |
A 2D to 3D Conversion Scheme Based on Depth Cues Analysis for MPEG Videos
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Lin, Guo-Shiang;Yeh, Cheng-Ying;Chen, Wei-Chih;Lie, Wen-Nung |
| 臺大學術典藏 |
2018-09-10T08:08:01Z |
A 2D-to-3D conversion system using edge information
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Cheng;C.-C.;Li;C.-T.;Chen;L.-G.; Cheng; C.-C.; Li; C.-T.; Chen; L.-G.; LIANG-GEE CHEN |
| 國立交通大學 |
2019-04-03T06:48:03Z |
A 2D/3D Hybrid Integral Imaging Display by Using Fast Switchable Hexagonal Liquid Crystal Lens Array
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Lee, Hsin-Hsueh; Huang, Ping-Ju; Wu, Jui-Yi; Hsieh, Po-Yuan; Huang, Yi-Pai |
| 國立臺灣科技大學 |
2013 |
A 2D/3D RFID static test system developed in a spherical near-field antenna measurement chamber
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Lee, Y.-H.;Tsai, M.-Y.;Yang, C.-F.;Lin, I. |
| 國立臺灣科技大學 |
2015 |
A 2D/3D switchable autostereoscopic display system, an acousto-optic lens approach
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Chen, I.-J.;Tarn, C.-W. |
| 大葉大學 |
2009-04-29 |
A 2D/3D Video Conversion Scheme Based on Multiple Depth Cue Analyses
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Lin, Guo-Shiang;Yeh, Cheng-Ying;Lie, Wen-Nung;Liu, Kai-Che;Chen, Wen-Chao |
| 國立臺灣大學 |
2005-05 |
A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications
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Wey, I-Chyn; Chang, Lung-Hao; Chen, You-Gang; Chang, Shih-Hung; Wu, An-Yeu |
| 臺大學術典藏 |
2018-09-10T05:24:14Z |
A 2gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications
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Wey, I.-C.; Chang, L.-H.; Chen, Y.-G.; Chang, S.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 國立中山大學 |
2004-08 |
A 2K/8K Dual-Mode FFT Processor for OFDM of DVB-T Receivers
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C.C. Wang;J.M. Huang;H.C. Cheng |
| 國立中山大學 |
2005-02 |
A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers
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C.C. Wang;J.M. Huang;H.C. Cheng |
顯示項目 91626-91635 / 2348419 (共234842頁)
<< < 9158 9159 9160 9161 9162 9163 9164 9165 9166 9167 > >>
每頁顯示[10|25|50]項目
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