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顯示項目 92241-92290 / 2346788 (共46936頁)
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機構 日期 題名 作者
臺大學術典藏 2020-04-07T13:17:44Z A 59-year-old male with right lateral knee pain TYNG-GUEY WANG; Wei K.-C.
臺大學術典藏 2020-04-08T02:10:18Z A 59-year-old male with right lateral knee pain Wei K.-C.; TYNG-GUEY WANG; Wei K.-C.;Tyng-Guey Wang
臺大學術典藏 2022-08-05T08:59:05Z A 59-year-old male with right lateral knee pain Wei K.-C.; TYNG-GUEY WANG
臺大學術典藏 2018-09-10T08:08:01Z A 59.5mW scalable/multi-view video decoder chip for quad/3D full HDTV and video streaming applications Chuang, T.-D.;Tsung, P.-K.;Lin, P.-C.;Chang, L.-M.;Ma, T.-C.;Chen, Y.-H.;Chen, L.-G.; Chuang, T.-D.; Tsung, P.-K.; Lin, P.-C.; Chang, L.-M.; Ma, T.-C.; Chen, Y.-H.; Chen, L.-G.; LIANG-GEE CHEN
臺大學術典藏 2019-12-20T01:18:33Z A 5d/3d duality from relativistic integrable system Chen, H.-Y.; Hollowood, T.J.; Zhao, P.; Chen, H.-Y.; Hollowood, T.J.; Zhao, P.; HENG-YU CHEN
國立臺北護理健康大學 2021-05 A 5G Spectrum Demanding Estimation Framework Considering Coalition Formation of Taiwan Telecommunication Operator Tsai, Wang-You; Chou, Tzu-Chuan; Chen, Yen-Hung; Jan, Pi-Tzong
國立交通大學 2017-04-21T06:49:54Z A 5Gb/s Pulse Signaling Interface for Low Power On-Chip Data Communication Lin, Hung-Wen; Ho, Ying-Chieh; Fa, YingLin; Su, ChauChin
臺大學術典藏 2018-09-10T05:27:04Z A 5Gbps CMOS automatic gain control amplifier for 10GBase-LX I-Hsin Wang; Wei-Sheng Chen; Shen-Iuan Liu; SHEN-IUAN LIU
國立交通大學 2014-12-12T02:30:38Z A 5GHz CMOS Power Amplifier for IEEE 802.11a Wireless LAN 王自強; Dz-Chung Wang; 溫懷岸; 羅正忠; Kuei-Ann Wen; Jen-Chung Lou
國立臺灣大學 2004 A 5GHz LNA with new compact gain controllable active balun for ISM band applications Rajashekharaiah, Mallesh; Upadhyaya, Parag; Heo, Deukhyoun; Chen, Yi-Jan Emery
國立臺灣科技大學 2007 A 5GHz low phase noise hartley quadrature CMOS VCO Jang S.-L.; Chen H.-M.; Han J.-C.; Lee C.-F.; Jhuang Y.-D.
臺大學術典藏 2018-09-10T07:43:10Z A 5GHz Phase-Locked Loop Using Dynamic Phase-Error Compensation Technique for Fast Settling in 0.18-μm CMOS W.-H. Chiu;Y.-H. Huang;T.-H. Lin; W.-H. Chiu; Y.-H. Huang; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T05:50:33Z A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications Lin, C.-P.; Tseng, P.-C.; Chiu, Y.-T.; Lin, S.-S.; Cheng, C.-C.; Fang, H.-C.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN
亞洲大學 2010-11 A 5V/200V SOI Device with a Vertically Linear Graded Drift Region 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
國立臺灣大學 2007 A 5–6 GHz 1-V CMOS Direct-Conversion Receiver With an Integrated Quadrature Coupler Chen, Hsiao-Chin; Wang, Tao; Lu, Shey-Shi
國立臺灣科技大學 2007 A 6 GHz low power differential VCO Jang, S.-L.;Lee, S.-H.;Chiu, C.-C.;Chuang, Y.-H.
臺大學術典藏 2002-05 A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay Liu, Shen-Iuan; Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan; Chang, Hsiang-Hui; Lin, Jyh-Woei
國立臺灣大學 2002-05 A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan
國立交通大學 2014-12-08T15:25:24Z A 6 similar to 10-GHz ultra-WideBand tunable LNA Chen, YC; Kuo, CN
臺大學術典藏 2018-09-10T14:57:27Z A 6-Bit 1 GS/s pipeline ADC using incomplete settling with background sampling-point calibration Lai, C.-F.; Chen, H.-S.; HSIN-SHU CHEN; Tseng, C.-J.;Lai, C.-F.;Chen, H.-S.; Tseng, C.-J.
臺大學術典藏 2018-09-10T14:57:27Z A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS Tai, H.-Y.;Tsai, C.-H.;Tsai, P.-Y.;Chen, H.-W.;Chen, H.-S.; Tai, H.-Y.; Tsai, C.-H.; Tsai, P.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN
國立臺灣科技大學 2018 A 6-bit 1.3-GS/s ping-pong domino-SAR ADC in 55-nm CMOS Chung Y.-H.; Rih W.-S.; Chang C.-W.
國立臺灣科技大學 2018 A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOS Chung, Y.-H.;Rih, W.-S.
臺大學術典藏 2004-08 A 6-bit 500-Ms/s digital self-calibrated pipelined analog-to-digital converter Chen, Yu-Hsun; Lee, Tai-Cheng; Chen, Yu-Hsun; Lee, Tai-Cheng
國立臺灣大學 2004-08 A 6-bit 500-Ms/s digital self-calibrated pipelined analog-to-digital converter Chen, Yu-Hsun; Lee, Tai-Cheng
國立臺灣大學 2007 A 6-bit 800-MS/s Pipelined A/D Converter With Open-Loop Amplifiers Shen, Ding-Lan; Lee, Tai-Cheng
國立成功大學 2012-11 A 6-bit Current-Steering DAC With Compound Current Cells for Both Communication and Rail-to-Rail Voltage-Source Applications Chen, Ren-Li; Chang, Soon-Jyh
臺大學術典藏 2018-09-10T07:09:32Z A 6-bit Pipelined Analog-to-Digital Converter with Current-Switching Open-Loop Residue Amplification Feng-Chiu Hsieh;Tai-Cheng; Feng-Chiu Hsieh; Tai-Cheng; TAI-CHENG LEE
國立中山大學 2005-08 A 6-bit SAR pipelined ADC using improved TIQ technology Yan-Huei Lee;Jyi-Tsong Lin
臺大學術典藏 2018-09-10T15:00:41Z A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) Circuits L-H Chiueh;T-C Lee; L-H Chiueh; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2018-09-10T09:25:30Z A 6-GHz All Digital PLL for Spread Spectrum Clock Generators (SSCG) C-D Su;C-W Lee;T-C Lee; C-D Su; C-W Lee; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2020-06-11T06:31:38Z A 6-GHz integer frequency synthesizer for SATA III applications in 0.18-μm CMOS technology Cheng, J.-H.;Lin, J.-A.;Wu, M.-H.;Tsai, J.-H.;Huang, T.-W.; Cheng, J.-H.; Lin, J.-A.; Wu, M.-H.; Tsai, J.-H.; Huang, T.-W.; TIAN-WEI HUANG
臺大學術典藏 2018-09-10T09:50:53Z A 6-GHz Self-Oscillating Spread-Spectrum Clock Generator C-H Wong;T-C Lee; C-H Wong; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2020-06-11T06:31:34Z A 6-GHz spread spectrum clock generation with EMI reduction of 30.2 dB for SATA-III applications Alsuraisry, H.;Cheng, J.-H.;Lin, J.-A.;Kuo, Y.-H.;Tsai, J.-H.;Huang, T.-W.; Alsuraisry, H.; Cheng, J.-H.; Lin, J.-A.; Kuo, Y.-H.; Tsai, J.-H.; Huang, T.-W.; TIAN-WEI HUANG
國立交通大學 2014-12-08T15:41:09Z A 6-GS/s, 6-bit, At-speed Testable ADC and DAC Pair in 0.13 mu m CMOS Ho, Chen-Kang; Hong, Hao-Chiao
國立臺灣大學 2008 A 6-Year Retrospective Epidemiologic Study of Pediatric Pneumococcal Pneumonia in Taiwan 黃懿娟; 何愉懷; 謝育嘉; 林曉娟; 黃高彬; 張鑾英; 黃立民; HUANG, YI-CHUAN; HO, YU-HUAI; HSIEH,YU- CHIA; LIN, HSIAO-CHUAN; HWANG, KAO-PIN; CHANG, LUAN-YIN; HUANG, LI-MIN
國立臺灣大學 2008-12 A 6-year retrospective epidemiologic study of pediatric pneumococcal pneumonia in Taiwan Huang, YC; Ho, YH; Hsieh, YC; Lin, HC; Hwang, KP; Chang, LY; Huang, LM
臺大學術典藏 2020-12-15T07:42:23Z A 6-year retrospective epidemiologic study of pediatric pneumococcal pneumonia in Taiwan Huang Y.-C.;Ho Y.-H.;Hsieh Y.-C.;Lin H.-C.;Hwang K.-P.;Luan-Yin Chang;Huang L.-M.; Huang Y.-C.; Ho Y.-H.; Hsieh Y.-C.; Lin H.-C.; Hwang K.-P.; LUAN-YIN CHANG; Huang L.-M.
臺大學術典藏 2021-06-24T07:17:07Z A 6-year retrospective epidemiologic study of pediatric pneumococcal pneumonia in Taiwan Huang Y.-C.; Ho Y.-H.; Hsieh Y.-C.; Lin H.-C.; Hwang K.-P.; Chang L.-Y.; LI-MIN HUANG
中國醫藥大學 2008-04 A 6-year retrospective epidemiologic study of pediatric pneumococcal pneumonia in Taiwan. 黃懿娟(Yi-Chung Huang); 何瑜懷(Yu-Huai Ho); 謝高嘉(Yu-Chia Hsieh); 林曉娟(Hsiao-Chuan Lin); 黃高彬(Kao-Pin Hwang); 張巒英(Luan-Yin Chang); 黃立民(Li-Min Huang)
國立臺灣大學 2005 A 6.25 mm2 2.4 GHz CMOS 802.11b Transceiver Hsieh, Yong-Hsiang; Hu, Wei-Yi; Li, Wen-Kai; Lin, Shin-Ming; Chen, Chao-Liang; Chen, David J.; Chen, Sao-Jie
臺大學術典藏 2018-09-10T04:53:33Z A 6.25mm2 2.4GHz CMOS 802.11b transceiver Hsieh, Y.-H.; Hu, W.-Y.; Lin, S.-M.; Chang, J.; Chen, C.-L.; Li, W.-K.; Lo, C.-Y.; Chen, S.-J.; SAO-JIE CHEN
國立中山大學 2002-05 A 6.4 Gbps FIFO Design for 8-32 two-way Data Exchange Bus C.C. Wang;Y.H. Hsueh;Y.W. Chen
臺大學術典藏 2021-03-12T08:40:59Z A 6.5/11/17.5/30-GHz high throughput interferometer-based reactance sensors using injection-locked oscillators and ping-pong nested chopping JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN
臺大學術典藏 2021-03-12T08:41:00Z A 6.5/17.5-GHz dual-channel interferometer-based capacitive Sensor in 65-nm CMOS for high-speed flow cytometry JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN
國立中山大學 2006-05 A 6.57 mW ZigBee Transceiver for 868/915 MHz Band C.C. Wang;J.M. Huang;C.Y. Chang;K.T. Cheng;C.P. Li
國立中山大學 2006-05-21 A 6.57 mW ZigBee Transceiver for 868/915 MHz Band C.C. Wang; J.M. Huang; C.Y. Chang; C.P. Li
臺大學術典藏 2020-06-11T06:34:51Z A 6.7 MHz to 1.24 GHz 0.0318 mm 2 Fast-Locking All-Digital DLL Using Phase-Tracing Delay Unit in 90 nm CMOS Hsieh, M.-H.; Chen, L.-H.; Liu, S.-I.; Chen, C.C.-P.; SHEN-IUAN LIU; Hsieh, M.-H.;Chen, L.-H.;Liu, S.-I.;Chen, C.C.-P.
臺大學術典藏 2018-09-10T09:24:58Z A 6.7MHz-to-1.24GHz 0.0318mm 2 fast-locking all-digital DLL in 90nm CMOS Liang-Hsin Chen;Min-Han Hsieh;Shen-Iuan Liu;Charlie Chung-Ping Chen; Liang-Hsin Chen; Min-Han Hsieh; Shen-Iuan Liu; Charlie Chung-Ping Chen; SHEN-IUAN LIU
國立交通大學 2015-07-21T08:29:06Z A 60 GHz 19.6 dBm Power Amplifier With 18.3% PAE in 40 nm CMOS Tseng, Chien-Wei; Wang, Yu-Jiu

顯示項目 92241-92290 / 2346788 (共46936頁)
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