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顯示項目 92241-92265 / 2346275 (共93851頁)
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機構 日期 題名 作者
國立臺灣大學 2004 A 5GHz LNA with new compact gain controllable active balun for ISM band applications Rajashekharaiah, Mallesh; Upadhyaya, Parag; Heo, Deukhyoun; Chen, Yi-Jan Emery
國立臺灣科技大學 2007 A 5GHz low phase noise hartley quadrature CMOS VCO Jang S.-L.; Chen H.-M.; Han J.-C.; Lee C.-F.; Jhuang Y.-D.
臺大學術典藏 2018-09-10T07:43:10Z A 5GHz Phase-Locked Loop Using Dynamic Phase-Error Compensation Technique for Fast Settling in 0.18-μm CMOS W.-H. Chiu;Y.-H. Huang;T.-H. Lin; W.-H. Chiu; Y.-H. Huang; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T05:50:33Z A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications Lin, C.-P.; Tseng, P.-C.; Chiu, Y.-T.; Lin, S.-S.; Cheng, C.-C.; Fang, H.-C.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN
亞洲大學 2010-11 A 5V/200V SOI Device with a Vertically Linear Graded Drift Region 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
國立臺灣大學 2007 A 5–6 GHz 1-V CMOS Direct-Conversion Receiver With an Integrated Quadrature Coupler Chen, Hsiao-Chin; Wang, Tao; Lu, Shey-Shi
國立臺灣科技大學 2007 A 6 GHz low power differential VCO Jang, S.-L.;Lee, S.-H.;Chiu, C.-C.;Chuang, Y.-H.
臺大學術典藏 2002-05 A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay Liu, Shen-Iuan; Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan; Chang, Hsiang-Hui; Lin, Jyh-Woei
國立臺灣大學 2002-05 A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay Chang, Hsiang-Hui; Lin, Jyh-Woei; Liu, Shen-Iuan
國立交通大學 2014-12-08T15:25:24Z A 6 similar to 10-GHz ultra-WideBand tunable LNA Chen, YC; Kuo, CN
臺大學術典藏 2018-09-10T14:57:27Z A 6-Bit 1 GS/s pipeline ADC using incomplete settling with background sampling-point calibration Lai, C.-F.; Chen, H.-S.; HSIN-SHU CHEN; Tseng, C.-J.;Lai, C.-F.;Chen, H.-S.; Tseng, C.-J.
臺大學術典藏 2018-09-10T14:57:27Z A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS Tai, H.-Y.;Tsai, C.-H.;Tsai, P.-Y.;Chen, H.-W.;Chen, H.-S.; Tai, H.-Y.; Tsai, C.-H.; Tsai, P.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN
國立臺灣科技大學 2018 A 6-bit 1.3-GS/s ping-pong domino-SAR ADC in 55-nm CMOS Chung Y.-H.; Rih W.-S.; Chang C.-W.
國立臺灣科技大學 2018 A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOS Chung, Y.-H.;Rih, W.-S.
臺大學術典藏 2004-08 A 6-bit 500-Ms/s digital self-calibrated pipelined analog-to-digital converter Chen, Yu-Hsun; Lee, Tai-Cheng; Chen, Yu-Hsun; Lee, Tai-Cheng
國立臺灣大學 2004-08 A 6-bit 500-Ms/s digital self-calibrated pipelined analog-to-digital converter Chen, Yu-Hsun; Lee, Tai-Cheng
國立臺灣大學 2007 A 6-bit 800-MS/s Pipelined A/D Converter With Open-Loop Amplifiers Shen, Ding-Lan; Lee, Tai-Cheng
國立成功大學 2012-11 A 6-bit Current-Steering DAC With Compound Current Cells for Both Communication and Rail-to-Rail Voltage-Source Applications Chen, Ren-Li; Chang, Soon-Jyh
臺大學術典藏 2018-09-10T07:09:32Z A 6-bit Pipelined Analog-to-Digital Converter with Current-Switching Open-Loop Residue Amplification Feng-Chiu Hsieh;Tai-Cheng; Feng-Chiu Hsieh; Tai-Cheng; TAI-CHENG LEE
國立中山大學 2005-08 A 6-bit SAR pipelined ADC using improved TIQ technology Yan-Huei Lee;Jyi-Tsong Lin
臺大學術典藏 2018-09-10T15:00:41Z A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) Circuits L-H Chiueh;T-C Lee; L-H Chiueh; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2018-09-10T09:25:30Z A 6-GHz All Digital PLL for Spread Spectrum Clock Generators (SSCG) C-D Su;C-W Lee;T-C Lee; C-D Su; C-W Lee; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2020-06-11T06:31:38Z A 6-GHz integer frequency synthesizer for SATA III applications in 0.18-μm CMOS technology Cheng, J.-H.;Lin, J.-A.;Wu, M.-H.;Tsai, J.-H.;Huang, T.-W.; Cheng, J.-H.; Lin, J.-A.; Wu, M.-H.; Tsai, J.-H.; Huang, T.-W.; TIAN-WEI HUANG
臺大學術典藏 2018-09-10T09:50:53Z A 6-GHz Self-Oscillating Spread-Spectrum Clock Generator C-H Wong;T-C Lee; C-H Wong; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2020-06-11T06:31:34Z A 6-GHz spread spectrum clock generation with EMI reduction of 30.2 dB for SATA-III applications Alsuraisry, H.;Cheng, J.-H.;Lin, J.-A.;Kuo, Y.-H.;Tsai, J.-H.;Huang, T.-W.; Alsuraisry, H.; Cheng, J.-H.; Lin, J.-A.; Kuo, Y.-H.; Tsai, J.-H.; Huang, T.-W.; TIAN-WEI HUANG

顯示項目 92241-92265 / 2346275 (共93851頁)
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