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Institution	Date	Title	Author
臺大學術典藏	2003-05	Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264	Hsieh, Bing-Yu; Chen, Liang-Gee; Wang, Tu-Chih; Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee; Huang, Yu-Wen
國立臺灣大學	2003-05	Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264	Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee
臺大學術典藏	2018-09-10T04:27:46Z	Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264	Huang, Y.-W.; Wang, T.-C.; Hsieh, B.-Y.; Chen, L.-G.; LIANG-GEE CHEN
臺大學術典藏	2004-08	Hardware architecture design for visual processing: present and future	Tseng, Po-Chih; Chen, Liang-Gee; Tseng, Po-Chih; Chen, Liang-Gee
國立臺灣大學	2004-08	Hardware architecture design for visual processing: present and future	Tseng, Po-Chih; Chen, Liang-Gee
臺大學術典藏	2018-09-10T04:47:20Z	Hardware architecture design for visual processing: Present and future	Tseng, P.-C.; Chen, L.-G.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN
臺大學術典藏	2006-01	Hardware architecture design of an H.264/AVC video codec	Chen, Tung-Chien; Lian, Chung-Jr; Chen, Liang-Gee; Chen, Tung-Chien; Lian, Chung-Jr; Chen, Liang-Gee
國立臺灣大學	2006-01	Hardware architecture design of an H.264/AVC video codec	Chen, Tung-Chien; Lian, Chung-Jr; Chen, Liang-Gee
臺大學術典藏	2018-09-10T05:50:30Z	Hardware architecture design of an H.264/AVC video codec	Chen, T.-C.; Lian Jr.; C.; Chen, L.-G.; LIANG-GEE CHEN
臺大學術典藏	2018-09-10T08:42:33Z	Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation	Hsu, Kung-Yen;Chien, Shao-Yi; Hsu, Kung-Yen; Chien, Shao-Yi; SHAO-YI CHIEN

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