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Showing items 92076-92085 of 2346288 (234629 Page(s) Totally) << < 9203 9204 9205 9206 9207 9208 9209 9210 9211 9212 > >> View [10|25|50] records per page
| 國立臺灣大學 |
2009 |
A 5-GHz CMOS Frequency Synthesizer With an Injection-Locked Frequency Divider and Differential Switched Capacitors
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Deng, P.-Y.; Kiang, J.-F. |
| 元智大學 |
2004-05 |
A 5-GHZ delta-sigma PLL frequency synthesizer for WLAN applications
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吳紹懋; 陳威良 |
| 國立交通大學 |
2014-12-08T15:09:31Z |
A 5-GHz Differential Low-Noise Amplifier With High Pin-to-Pin ESD Robustness in a 130-nm CMOS Process
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Hsiao, Yuan-Wen; Ker, Ming-Dou |
| 義守大學 |
2009-05 |
A 5-GHz Differential Low-Noise Amplifier With High Pin-to-Pin ESD Robustness in a 130-nm CMOS Process
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Yuan-Wen Hsiao;Ming-Dou Ker |
| 臺大學術典藏 |
2018-09-10T04:36:04Z |
A 5-GHz Direct-Conversion CMOS Transceiver Utilizing Automatic Frequency Control for the IEEE 802.11a Wireless LAN Standard
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Z.M. Shi; S. An; ; L. Lin; K. Carter; M. Kappes; Tsung-Hsien (Eric) Lin; T. Nguyen; D. Yuan; S. Wu; Y.C. Wang; V. Fong; A. Rofougaran; A. Behzad; TSUNG-HSIEN LIN et al. |
| 國立交通大學 |
2014-12-08T15:25:38Z |
A 5-GHz direct-conversion receiver with I/Q phase and gain error calibration
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Chen, WZ; Lee, TL; Lu, TY |
| 臺大學術典藏 |
2020-06-11T06:26:18Z |
A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS
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Chiu, W.-H.;Cheng, C.-Y.;Lin, T.-H.; Chiu, W.-H.; Cheng, C.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
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陳志成?; Chen, CC |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
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陳世璋?; Chen, CZ |
| 國立暨南國際大學 |
2008 |
A 5-GHz fully integrated low-power wide-tuning-range CMOS LC VCO
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林佑昇?; Lin, YS |
Showing items 92076-92085 of 2346288 (234629 Page(s) Totally) << < 9203 9204 9205 9206 9207 9208 9209 9210 9211 9212 > >> View [10|25|50] records per page
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