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顯示項目 90866-90890 / 2346788 (共93872頁)
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機構 日期 題名 作者
臺大學術典藏 2018-09-10T07:41:58Z A 1.5GHz phase-locked loop with leakage current suppression in 65nm CMOS Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
國立交通大學 2014-12-08T15:20:50Z A 1.5V 7.5uW Programmable Gain Amplifier for Multiple Biomedical Signal Acquisition Kao, Shuo-Ting; Lu, Hungwen; Su, ChauChin
國立交通大學 2014-12-08T15:27:27Z A 1.5V differential cross-coupled bootstrapped BiCMOS logic Tseng, YK; Wu, CY
臺大學術典藏 2021-02-26T08:42:04Z A 1.5£gJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro Robots Chung, C.; Yang, C.-H.; CHIA-HSIANG YANG
國立臺灣大學 2008 A 1.5–9.6 GHz Monolithic Active Quasi-Circulator in 0.18μm CMOS Technology Shin, Shih-Chieh; Huang, Jhih-Yu; Lin, Kun-You; Wang, Huei
國立成功大學 2021 A 1.6-Gs/s 8b flash-SAR time-interleaved ADC with top-plate residue based gain calibration Hsu, C.-W.;Chang, S.-J.
臺大學術典藏 2018-09-10T08:18:16Z A 1.62/2.7-Gb/s adaptive transmitter with two-tap preemphasis using a propagation-time detector Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2021-11-21T23:19:02Z A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS Liu, Yu Tung; Kung, Chu King; Hsieh, Ming Hang; Wang, Hsiu Wen; CHUN-PIN LIN; Yu, Chao Yang; Chen, Chi Shi; TZI-DAR CHIUEH
臺大學術典藏 2022-02-21T23:30:47Z A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS Liu, Yu Tung; Kung, Chu King; Hsieh, Ming Hang; Wang, Hsiu Wen; CHUN-PIN LIN; Yu, Chao Yang; Chen, Chi Shi; TZI-DAR CHIUEH
國立交通大學 2014-12-08T15:41:18Z A 1.69 Gb/s Area-Efficient AES Crypto Core with Compact On-the-fly Key Expansion Unit Liu, Po-Chun; Chang, Hsie-Chia; Lee, Chen-Yi
元智大學 2009-06 A 1.7-mW, 14.4% Frequency Tuning, 24GHz VCO with Current-Reused Structure Using 0.18-um CMOS Technology 蔡政翰; Yen-Hung Kuo; Tian-Wei Huang
元智大學 2009-06 A 1.7-mW, 14.4% Frequency Tuning, 24GHz VCO with Current-Reused Structure Using 0.18-um CMOS Technology 蔡政翰; Yen-Hung Kuo; Tian-Wei Huang
國立臺灣師範大學 2014-10-30T09:28:46Z A 1.7-mW, 14.4% Frequency Tuning,24GHz VCO with Current-Reused Structure Using 0.18-μm CMOS Technology Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang
臺大學術典藏 2018-09-10T07:42:57Z A 1.7-mW, 16.8% Frequency Tuning, 24-GHz Transformer-Based LC-VCO using 0.18-um CMOS Technology Yen-Hung Kuo;Jeng-Han Tsai;Tian-Wei Huang; Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang; TIAN-WEI HUANG
國立交通大學 2014-12-08T15:26:52Z A 1.75GHz inductor-less CMOS low noise amplifier with high-Q active inductor load Yang, JN; Cheng, YC; Hsu, TY; Hsu, TR; Lee, CY
國立交通大學 2014-12-08T15:24:51Z A 1.7mW all digital phase-locked loop with new gain generator and low power DCO Chao, Tzu-Chiang; Hwang, Wei
國立臺灣大學 2004-08 A 1.7~3.125Gbps clock and data recovery circuit using a gated frequency detector Yang, Rong-Jyi; Liu, Shen-Iuan
元智大學 2014-04-26 A 1.8 GHz CMOS High-Linear Power-Combining Power Amplifier Using On-Chip Transmission Line Transformer Ming-Yi Chen; Jeng-Rern Yang
國立中山大學 2009-12 A 1.8 V to 3.3 V Level-Converting Flip-Flop Design for Multiple Power Supply Systems C.C. Wang;K.S.M. Li;S.J. Wang
國立交通大學 2014-12-08T15:25:41Z A 1.8 V, 10 Gbps fully integrated CMOS optical receiver analog front end Chen, WZ; Cheng, YL; Lin, DS
臺大學術典藏 2021-03-12T08:40:55Z A 1.8-GHz Near-Field Dielectric Plethysmography Heart-Rate Sensor with Time-Based Edge Sampling JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN
國立交通大學 2014-12-08T15:18:59Z A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end Chen, WZ; Cheng, YL; Lin, DS
淡江大學 2013-06 A 1.8-V 4-ppm oC Reference Current with Process and Temperature Yang, Wei-Bin; Hong, Ming-Hao; Yeh, Sheng-Shuh
淡江大學 2015/09/13 A 1.8-V Temperature Coefficient is 4.36-ppm/°C Bandgap Reference Current with Process Calibration Yang, Wei-Bin
元智大學 2016-06-23 A 1.8/2.6 GHz CMOS High Linearity Power Amplifier for LTE application Chih-Huang Lin; Jeng-Rern Yang

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